1. Field of the Invention
The present invention relates to an interrupt handling of a disk array apparatus. More particularly, the present invention relates to a disk array apparatus that has constitution capable of implementing interrupt handling so that completion reports of a plurality of data transmission are summarized in one interrupt and an improvement of an interrupt execution method of the disk array apparatus.
2. Description of the Related Art
In recent years development of computer with high-speed operation is making progress. Under the circumstances, development of peripheral apparatus of the computer with high-speed operation is ardently desired. Magnetic disk apparatus is one of peripheral apparatus of the computer. A disk array apparatus is made to enhance reliability of the magnetic disk apparatus. Also, the disk array apparatus is one whose function enables the magnetic disk apparatus to work in more high-speed operation.
The Japanese Patent Application Laid Open No. HEI 10-207822 discloses one of the method for executing high-speed data processing. This method is generally known. According to this method, efficiency of a processing apparatus is improved in such a way that the number of the interrupt is reduced. Namely, the first transfer completion report of a data packet is received. The interrupt pauses and waits for an elapse of stand-by permissible time set beforehand from the first transfer completion report of the packet data. Or the interrupt pauses and waits until the transfer completion report reaches the number of limit set beforehand.
However, there occurs following problems when executing the aforementioned way for obtaining high-speed operation with the interrupt reduced in the disk array apparatus.
Generally, the disk array apparatus uses an exclusive cache memory for executing read-out of the data or write of the data. This exclusive cache memory of the disk array apparatus is used for high-speed processing of a read-out command or a write command that are received from an upper level apparatus. Here, the official gazette of the Japanese Patent Application Laid Open No. HEI 7-311659 discloses the way of access of the cache memory. Generally, access is executed using unit of data block (hereinafter referred to as page) in which basic unit of the data block multiplies sector capacity on the magnetic disk apparatus thus contained by an integer.
For that reason, exclusive operation is required when accessing the page of the cache memory. The exclusive operation is one in which acquisition (open) of the corresponding page and release (close) of the acquired page are implemented in order to guarantee legality of the data.
FIG. 6 is a flowchart. The flowchart indicates processing procedure of the disk array apparatus when receiving a write command or a read-out command from an upper level apparatus. The disk array apparatus receives the write command from the upper level apparatus (S 201). The disk array apparatus verifies whether or not page of the cache memory including an objective sector to be written is already opened. If the corresponding page is already opened, operation pauses and waits until the page is closed caused by the necessary point of maintenance of exclusiveness (S 202). The disk array apparatus newly opens the corresponding page (S 203). Subsequently, the disk array apparatus starts data transfer to receive the write data from the upper level apparatus for storing in the cache memory (S 204). Here, completion of the data transfer is reported by the interrupt. Therefore, operation pauses and waits for the interrupt of the transfer completion report which indicates its completion (S 205). Then, the interrupt of the transfer completion report is detected, and completion of the data transfer is ascertained. After this operation, processing ends while closing the opened page (S 206).
On the other hand, when the disk array apparatus receives the read-out command from the upper level apparatus, the disk array apparatus, firstly, verifies whether or not the page including the data of objective position is hit (to be developed) within the cache memory (S 207). The disk array apparatus opens the page in the case of cache-hit (S 208). While, in the case of cache-miss the disk array apparatus opens the page of the magnetic disk apparatus including the data of objective position (S 209), and the disk array apparatus reads-out the data from the magnetic disk apparatus to store in the cache memory (S 210). Subsequently, the disk array apparatus starts the data transfer from the disk array apparatus to the upper level apparatus (S 211), and operation pauses and waits for the interrupt of the transfer completion report that indicates its completion (S 212). Then, when the data transfer is completed, the disk array apparatus closes the opened page.
The disk array apparatus executes aforementioned processing. In that case, the disk array apparatus receives various kinds of write commands continuously. Also, the disk array apparatus receives the write command with sequential pattern in the unit of sector and/or the write command for the same sector from the upper level apparatus. At this time, there is possibility that conflict occurs about the open of the page caused by overlapping accesses intended by the disk array apparatus to the same page at which data to be object of the write and/or read-out exists in connection with the cache memory. By this conflict, the write command following on the heels of the first received write command should wait until the page that becomes the object of the write depending on the first write command is closed.
Consequently, as described-above, if the aforementioned way is used, the problems occur. According to the aforementioned means, efficiency of a processing apparatus is improved in such a way that the number of the interrupt is reduced. Namely, the first transfer completion report of a data packet is received. The interrupt pauses and waits for an elapse of stand-by permissible time set beforehand from the first transfer completion report of the packet data. Or the interrupt pauses and waits until the transfer completion report reaches the number of limit set beforehand. Accordingly, completion of the first received write command namely the interrupt of the transfer completion report which indicates transfer completion of the last data packet of a series of the data packets does not generate until the stand-by permissible time set beforehand elapses, or until transfer of the data packets corresponding to the number of limit of the transfer completion report is executed. Accordingly, close of the page is not executed until the stand-by permissible time elapses, thus the problem that processing of the following write command should be waited occurs.
Namely, the delay interrupt described above is intended to improve performance of the processing apparatus in such a way as to reduce the number of generation of the interrupt. However, the delay interrupt itself increases substantial processing time more than necessary processing time. Thus, there is the problem that primary object of high-speed data processing is inhibited.
Further, there may occur of deterioration of performance caused by access conflict for the page of the cache memory not only when receiving continuous write command described-above, but also when receiving a write command continuously after the read-out command in which the data to be the object exists in the same page.
Namely, in such a conventional apparatus, control of delay interrupt for reducing rate of the interrupt is performed regardless of the type of the command received from the upper level apparatus. For that reason, there is the problem that processing performance of I/O deteriorates according to the type of pattern of the received command from the upper level apparatus.
In view of the foregoing it is an object of the present invention to provide a disk array apparatus and execution method of the same that achieves drawbacks of the conventional techniques, and enables the command processing received from the upper level apparatus to be executed in high-speed in such a way as to reduce rate of interrupt, while, it causes substantial processing speed not to deteriorate under the condition that write command from the upper level apparatus is executed continuously.
An interrupt execution method of a disk array apparatus with a cache memory contained of the present invention is the interrupt execution method of the disk array apparatus capable of performing a high-speed data transfer to an upper level apparatus. The aforementioned object is achieved in such a way as to selectively execute either an immediate interrupt for immediately generating the interrupt when receiving a transfer completion report of the first data packet or a delay interrupt for generating the interrupt while waiting an elapse of stand-by permissible time set beforehand or the number of limit of the transfer completion report set beforehand after receiving the transfer completion report of the first packet.
According to application of such constitution, the immediate interrupt and the delay interrupt are capable of being executed selectively. Therefore, when the whole handling speed is improved caused by reducing the number of generation of the interrupt by using the delay interrupt, the delay interrupt is selected to be used. On the other hand, if the whole handling speed is improved as access to the page of the cache memory is made to execute frequently rather than the number of generation itself of the interrupt being reduced, the immediate interrupt is selected to be used.
On this occasion, it is desirable that judgment of selection whether the immediate interrupt is executed or the delay interrupt is executed is performed on the basis of the type of the command from the upper level apparatus.
Generally, in the case of the write command the immediate interrupt is selected, while in the case of the read-out command the delay interrupt is selected. Generally, in the case of the write command, possibility of continuous handling operation is high in comparison with the read-out command, accordingly, also probability that competition of the page occurs is high.
Further, also it is possible to achieve the same object in such a way as to execute an immediate interrupt only when the specified type of the command, for instance, the write command from the upper level apparatus is detected while executing the delay interrupt with steady-state.
The disk array apparatus of the present invention is capable of achieving the aforementioned object by the constitution in which the disk array apparatus includes a main control unit which possesses both an immediate interrupt execution function and a delay interrupt execution function, flag setting means for setting either an immediate interrupt execution flag or a delay interrupt execution flag in compliance with a type of commands from an upper level apparatus, and interrupt function selecting means for starting either the immediate interrupt execution function or the delay interrupt execution function while referring to the set flag set by the flag setting means.
The flag setting means and the interrupt function selecting means are capable of being substantially placed in the apparatus as part of the operation program of the main control unit.
The flag setting means sets the immediate interrupt execution flag when the command from the upper level apparatus is a write command, while when the command from the upper level apparatus is a read-out command, the flag setting means sets the delay interrupt execution flag.
The disk array apparatus of the present invention is capable of achieving the aforementioned object by the configuration in which the disk array apparatus, in the above constitution, further includes interrupt command output means for outputting the immediate interrupt execution command only when specified command from the upper level apparatus is detected and a region of a cache memory that becomes execution object of this command is already used at this time point, and immediate interrupt starting means for starting the immediate interrupt execution function when receiving this immediate interrupt execution command instead of the flag setting means and the interrupt function selecting means.